Field of Invention
Embodiments of the invention relate generally to the field of solid-state drives (SSDs). More specifically, embodiments of the present invention include one or more systems, devices, and methods for efficiently providing a low power mode of the SSD.
Description of Related Art
A solid-state drive (SSD) uses one or more integrated circuits to store data persistently. Typically, the SSD includes at least a memory device (e.g., a non-volatile NAND memory device) that stores data, a controller that bridges the memory device to a host device, a connector that communicatively couples to the host device via a host interface (e.g., PCI Express (PCIe), Serial ATA (SATA), etc.), and one or more power management components, including a voltage regulator, that manages power for the SSD. The SSD may include a low power mode (e.g., the L1.2 state for PCIe, the DevSlp mode for SATA, etc.) that enables the SSD to use less power when the SSD is not in use. The low power mode may be especially useful for battery-powered mobile devices for which longer battery lifetime is desirable, such as laptops, tablets, phones, wearable devices, and the like.
In the low power mode, the controller may use a complex power islanding scheme to reduce the power used by the controller (e.g., by turning off blocks of the controller that are not used during the low power mode). However, at least some blocks in the controller (e.g., a host interface) remain powered to monitor the host device for a signal to exit the low power mode. Simultaneously, the voltage regulator also remains powered to supply power to these blocks. When the host interface receives the signal from the host device to exit the low power mode, the unpowered blocks of the controller may not immediately be powered up. Instead, a powered block of the controller sends a signal to the voltage regulator to power up unpowered components of the SSD, without which the unpowered blocks of the controller may not be powered up. Once the other unpowered components of the SSD are powered up, the unpowered blocks of the controller may then power up. This conventional scheme has certain drawbacks relating to power consumption, time-to-ready speed, and design complexity.
Accordingly, embodiments of the present invention may be directed to one or more of the problems set forth above.